Selective harmonic elimination using MFO for a reduced switch multi-level inverter topology

Shanono, Ibrahim Haruna and Nor Rul Hasma, Abdullah and Hamdan, Daniyal and Aisha, Muhammad (2022) Selective harmonic elimination using MFO for a reduced switch multi-level inverter topology. In: 2022 IEEE Symposium on Industrial Electronics and Applications, ISIEA 2022 , 16-17 July 2020 , Langkawi Island. pp. 1-6. (182556). ISBN 978-166548012-3

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Abstract

This research article proposed a new modified single-phase multi-level inverter topology with an optimal switching control strategy to reduce the inverter output harmonic distortion. The topology is configured to operate in asymmetric mode to generate eleven levels of output voltage steps. Additionally, a selective harmonic elimination technique has been deployed to minimize the switching loss and EMI. The Moth Flame Optimization (MFO) algorithm is deployed to compute the optimal switching angles. The proposed MLI topology is simulated in PSIM software using the optimized switching angles. The inverter performance parameters such as the total harmonic distortion (THD), harmonic amplitudes, switching, and conduction losses, were also analyzed and reported. The topology total harmonic distortion is 2.4%, hence satisfying the IEEE 519 standard.

Item Type:	Conference or Workshop Item (Lecture)
Additional Information:	Indexed by Scopus
Uncontrolled Keywords:	Hardware-In-Loop testing; Moth flame optimization; Multi-level converter topology; Selective harmonic elimination; Total harmonic distortion
Subjects:	T Technology > T Technology (General) T Technology > TA Engineering (General). Civil engineering (General) T Technology > TK Electrical engineering. Electronics Nuclear engineering
Faculty/Division:	Institute of Postgraduate Studies College of Engineering Faculty of Electrical and Electronic Engineering Technology
Depositing User:	Mr Muhamad Firdaus Janih@Jaini
Date Deposited:	28 Nov 2023 04:53
Last Modified:	28 Nov 2023 04:53
URI:	http://umpir.ump.edu.my/id/eprint/39411
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